Senior Process Integration Engineer (Multiple Positions) Full Time

40 hrs/week, Mon-Fri, 8:30 a.m. – 5:30 p.m.

MINIMUM REQUIREMENTS:

Must have a Bachelors degree or foreign equivalent in Electrical Engineering, Materials Science, Physics or a related field, plus 2 years of experience in an engineering role. Alternatively, company will accept a Master’s degree or foreign equivalent in Electrical Engineering, Materials Science, Physics or a related field, plus one year of experience in an engineering role.

Must have 1 year of experience in each of the following:

300mm semiconductor in polysilicon Gate Engineering, including process details and gate profile design, testline/monitoring structures, and performing device and yield analysis to uncover process weaknesses and potential enhancements; and
Technology transfer or process/tool matching.

Must have 1 year of experience in at least 3 of the following: Design of Experiment (DOE); Test run and optimize process parameters for new products; Statistical process control; Statistical methods for modeling multivariate data sets.

Must have 1 year of experience in at least 3 of the following: wafer cross section techniques; wafer fabrication processes; ion transport phenomena; plasma etching; plasma simulation; semiconductor thin film deposition; Atomic Layer Deposition (ALD); Chemical Vapor Deposition (CVD); Chemical mechanical polish (CMP), Lithography or Plasma Enhanced Chemical Vapor Deposition (PECVD).

Must have 1 year of experience in software: JMP.

Please email resume to and reference Job# 2605. Full-Time

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